--model ../../samples/scenes/cornell/CornellBox.obj
--view-file ../../samples/scenes/cornell/cornell.view
--light-file ../../samples/scenes/cornell/cornell.light
--width 64
--height 64
--pack-split-axis
--use-png-ext
--load-assembly rt-llvm.s
--config-file ../../samples/configs/tiny.config
--dcacheparams ../../samples/configs/dcacheparams.txt
--icacheparams ../../samples/configs/icacheparams.txt
--disable-usimm
--l1-off
--l2-off
--num-thread-procs 1
--num-icaches 1
--num-icache-banks 1
loading model ../../samples/scenes/cornell/CornellBox.obj
loading material file ../../samples/scenes/cornell/CornellBox.mtl
4 total materials
32 total triangles
0 total vertex normals
vertex min/max = x: (0.000000, 556.000000) y: (0.000000, 559.200012) z: (0.000000, 548.799988)
Starting BVH build.
BVH build complete with 33 nodes.
before rotations, SAH cost = 11.836378
Scene starts at 16551 (0x000040a7)
BVH bounds [0.000000 0.000000 0.000000] [556.000000 559.200012 548.799988]
Loading assembly file rt-llvm.s
	 <== Setup time: 5.987 seconds (0:0:5.987) ==>
Creating thread 0...
Thread 0 running cores	0 to	0 ...
	 <== Frame time: 17.855 seconds (0:0:17.855) ==>
System-wide instruction stats (sum/average of all cores):
profile data:
kernel	total calls	total cycles
Data dependence stalls (caused by):
   LOAD        	18647558	(88.511 %)
   FPINVSQRT   	285936	(1.357 %)
   RAND        	5189	(0.025 %)
   add_s       	222812	(1.058 %)
   div         	57344	(0.272 %)
   div_s       	1275849	(6.056 %)
   mul_s       	285195	(1.354 %)
   sub_s       	288085	(1.367 %)
Number of thread-cycles resource conflicts found when issuing:
Dynamic Instruction Mix: (14135990 total)
   FPMIN       	600005	(4.245 %)
   FPMAX       	600005	(4.245 %)
   LOAD        	1252304	(8.859 %)
   ATOMIC_INC  	4097	(0.029 %)
   FPINVSQRT   	20480	(0.145 %)
   STORE       	12288	(0.087 %)
   move        	545575	(3.859 %)
   RAND        	10378	(0.073 %)
   lb          	100955	(0.714 %)
   lbu         	7887	(0.056 %)
   sb          	25532	(0.181 %)
   neg_s       	3389	(0.024 %)
   addi        	1	(0.000 %)
   addiu       	632677	(4.476 %)
   addu        	158299	(1.120 %)
   add_s       	406785	(2.878 %)
   bal         	2	(0.000 %)
   bc1f        	239027	(1.691 %)
   bc1t        	253412	(1.793 %)
   beq         	4096	(0.029 %)
   beqz        	4097	(0.029 %)
   bnez        	49976	(0.354 %)
   blez        	79346	(0.561 %)
   bne         	8192	(0.058 %)
   cvt_s_w     	8195	(0.058 %)
   c_olt_s     	296163	(2.095 %)
   c_ule_s     	178799	(1.265 %)
   c_ult_s     	17477	(0.124 %)
   div         	4096	(0.029 %)
   div_s       	110806	(0.784 %)
   lui         	175739	(1.243 %)
   lw          	673450	(4.764 %)
   lwc1        	1549520	(10.962 %)
   mfhi        	4096	(0.029 %)
   mflo        	4096	(0.029 %)
   mov_s       	152508	(1.079 %)
   mtc1        	39069	(0.276 %)
   mul         	4097	(0.029 %)
   mul_s       	1790993	(12.670 %)
   j           	28869	(0.204 %)
   jal         	71155	(0.503 %)
   jr          	71156	(0.503 %)
   nop         	491157	(3.475 %)
   ori         	5	(0.000 %)
   sll         	124402	(0.880 %)
   slt         	37994	(0.269 %)
   sltiu       	4096	(0.029 %)
   subu        	8192	(0.058 %)
   sub_s       	1254205	(8.872 %)
   sw          	747392	(5.287 %)
   swc1        	1265360	(8.951 %)
   teq         	4096	(0.029 %)
   xor_m       	2	(0.000 %)
Issue statistics:
 --Average #threads Issuing each cycle: 0.3876
 --Issue Rate: 38.76%
 --iCache conflicts: 0 (0.000000%)
 --thread*cycles of resource conflicts: 0 (0.000000%)
 --thread*cycles of data dependence: 21067968 (59.845448%)
 --thread*cycles halted: 1 (0.000003%)
 --thread*cycles of issue NOP/other: 491157 (1.395175%)
Module Utilization

	           FP AddSub:    4.75
	           FP MinMax:    3.41
	          FP Compare:    1.41
	          Int AddSub:    2.40
	              FP Mul:    5.09
	             Int Mul:    0.01
	          FP InvSqrt:    0.06
	              FP Div:    0.33
	     Conversion Unit:    0.02

System-wide L1 stats (sum of all TMs):
L1 OFF!
L1 accesses: 	1264592
L1 hits: 	0
L1 misses: 	1264592
L1 bank conflicts: 	0
L1 stores: 	12288
L1 hit rate: 	0.000000
Hit under miss: 853244

 -= L2 #0 =-
L2 OFF!
L2 accesses: 	411348
L2 hits: 	0
L2 misses: 	411348
L2 stores: 	12288
L2 bank conflicts: 	0
L2 hit rate: 	0.000000
L2 memory faults: 0
L2 bandwidth limited stalls: 0

Bandwidth numbers for 1000MHz clock (GB/s):
   L1 to register bandwidth: 	 0.143687
   L2 to L1 bandwidth: 		 0.725482
   memory to L2 bandwidth: 	 0.747821

Chip area (mm2):
   Functional units: 	 0.148438
   L1 data caches: 	 0.000000
   L2 data caches: 	 0.000000
   Instruction caches: 	 0.090296
   Localstore units: 	 0.013963
   Register files: 	 0.014767
   ------------------------------
   Total: 		 0.267464

Energy consumption (Joules):
   Functional units: 	 0.000091
   L1 data caches: 	 0.000000
   L2 data caches: 	 0.000000
   Instruction caches: 	 0.000186
   Localstore units: 	 0.000030
   Register files: 	 0.000335
   DRAM: 		 0.000000
   ------------------------------
   Total: 		 0.000642
   Power draw (watts): 	 0.018236

FPS Statistics:
   Total clock cycles: 		 35203959
   FPS assuming 1000MHz clock: 	 28.4059


	 <== Total time: 23.886 seconds (0:0:23.886) ==>
